Freescale Semiconductor /MK21F12 /SIM /SCGC4

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCGC4

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)EWM 0 (0)CMT 0 (0)I2C0 0 (0)I2C1 0 (0)UART0 0 (0)UART1 0 (0)UART2 0 (0)UART3 0 (0)USBOTG 0 (0)CMP 0 (0)VREF

CMT=0, UART1=0, UART3=0, I2C1=0, VREF=0, UART0=0, USBOTG=0, I2C0=0, CMP=0, EWM=0, UART2=0

Description

System Clock Gating Control Register 4

Fields

EWM

EWM Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

CMT

CMT Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

I2C0

I2C0 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

I2C1

I2C1 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

UART0

UART0 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

UART1

UART1 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

UART2

UART2 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

UART3

UART3 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

USBOTG

USB Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

CMP

Comparator Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

VREF

VREF Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

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